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authorThomas Gleixner <tglx@linutronix.de>2015-07-13 22:45:53 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-08-26 15:23:23 +0200
commitf058dc80d6f964fa466650f74290a964a7f91c92 (patch)
tree4676d38e02eefe81d74d98163c50f469e7acda48
parentMIPS: Set up FTLB probability for I6400 (diff)
downloadlinux-f058dc80d6f964fa466650f74290a964a7f91c92.tar.xz
linux-f058dc80d6f964fa466650f74290a964a7f91c92.zip
MIPS: jz4740: Consolidate chained IRQ handler install/remove
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: linux-mips@linux-mips.org Cc: LKML <linux-kernel@vger.kernel.org> Cc: Jiang Liu <jiang.liu@linux.intel.com> Patchwork: https://patchwork.linux-mips.org/patch/10695/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/jz4740/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
index 54c80d42a88d..77df1602f818 100644
--- a/arch/mips/jz4740/gpio.c
+++ b/arch/mips/jz4740/gpio.c
@@ -423,8 +423,8 @@ static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100);
chip->irq = JZ4740_IRQ_INTC_GPIO(id);
- irq_set_handler_data(chip->irq, chip);
- irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler);
+ irq_set_chained_handler_and_data(chip->irq,
+ jz_gpio_irq_demux_handler, chip);
gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base,
chip->base, handle_level_irq);