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authorAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>2016-03-30 23:34:27 +0200
committerAlex Deucher <alexander.deucher@amd.com>2016-05-05 02:19:07 +0200
commitbd4c72d1e9dd7efdb9a990225f32e0130c0884af (patch)
tree01fafadd828a1d5f3b982970ac9d1f1c656362f2
parentdrm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC (diff)
downloadlinux-bd4c72d1e9dd7efdb9a990225f32e0130c0884af.tar.xz
linux-bd4c72d1e9dd7efdb9a990225f32e0130c0884af.zip
drm/amdgpu: Set PFLIP_SUBMITTED for crtc after address update
Also add some pflip debug prints. This change allows us to wait on pflip status until the new surface address is actually submitted to the register. This reverts ed3020e923240829dcdfd3343f6e91dc02c63775 drm/amdgpu: Move MMIO flip out of spinlocked region The original change assumed DAL will aquire locks inside DAL implemetion of page_flip callback which eventaully didn't happen. This moves the flip before status update which makes sense for the non-DAL code pathes as well. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_display.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 3fb405b3a614..0535095c4d14 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -131,12 +131,17 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
vblank->framedur_ns / 1000,
vblank->linedur_ns / 1000, stat, vpos, hpos);
- /* set the flip status */
+ /* Do the flip (mmio) */
+ adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base);
+
+ /* Set the flip status */
amdgpuCrtc->pflip_status = AMDGPU_FLIP_SUBMITTED;
spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
- /* Do the flip (mmio) */
- adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base);
+
+ DRM_DEBUG_DRIVER("crtc:%d[%p], pflip_stat:AMDGPU_FLIP_SUBMITTED, work: %p,\n",
+ amdgpuCrtc->crtc_id, amdgpuCrtc, work);
+
}
/*
@@ -252,6 +257,9 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
amdgpu_crtc->pflip_status = AMDGPU_FLIP_PENDING;
amdgpu_crtc->pflip_works = work;
+
+ DRM_DEBUG_DRIVER("crtc:%d[%p], pflip_stat:AMDGPU_FLIP_PENDING, work: %p,\n",
+ amdgpu_crtc->crtc_id, amdgpu_crtc, work);
/* update crtc fb */
crtc->primary->fb = fb;
spin_unlock_irqrestore(&crtc->dev->event_lock, flags);