diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2007-03-28 16:36:03 +0200 |
|---|---|---|
| committer | Paul Mundt <lethal@hera.kernel.org> | 2007-05-07 04:11:55 +0200 |
| commit | 0264f1603904dbee3196abc748a53fb0b23b8046 (patch) | |
| tree | 43678111c8404b9b957c79ed4d1168f4d40939e1 | |
| parent | sh: Add defconfig for se7722. (diff) | |
| download | linux-0264f1603904dbee3196abc748a53fb0b23b8046.tar.xz linux-0264f1603904dbee3196abc748a53fb0b23b8046.zip | |
sh: Tidy up L-BOX area5 addresses.
L-BOX can use the normal PA_AREA5_IO, there's no reason for it to
reproduce it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| -rw-r--r-- | arch/sh/boards/lboxre2/setup.c | 3 | ||||
| -rw-r--r-- | include/asm-sh/lboxre2.h | 9 |
2 files changed, 4 insertions, 8 deletions
diff --git a/arch/sh/boards/lboxre2/setup.c b/arch/sh/boards/lboxre2/setup.c index fc3cba3f0606..4e20f7c63bf3 100644 --- a/arch/sh/boards/lboxre2/setup.c +++ b/arch/sh/boards/lboxre2/setup.c @@ -15,6 +15,7 @@ #include <linux/platform_device.h> #include <linux/pata_platform.h> #include <asm/machvec.h> +#include <asm/addrspace.h> #include <asm/lboxre2.h> #include <asm/io.h> @@ -53,7 +54,7 @@ static int __init lboxre2_devices_setup(void) unsigned long paddrbase, psize; /* open I/O area window */ - paddrbase = virt_to_phys((void*)CONFIG_CF0_BASE_ADDR); + paddrbase = virt_to_phys((void*)PA_AREA5_IO); psize = PAGE_SIZE; prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16); cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); diff --git a/include/asm-sh/lboxre2.h b/include/asm-sh/lboxre2.h index 65775668df93..e6d160504923 100644 --- a/include/asm-sh/lboxre2.h +++ b/include/asm-sh/lboxre2.h @@ -2,8 +2,6 @@ #define __ASM_SH_LBOXRE2_H /* - * linux/include/asm-sh/lbox.h - * * Copyright (C) 2007 Nobuhiro Iwamatsu * * NTT COMWARE L-BOX RE2 support @@ -14,11 +12,8 @@ * */ -#define CONFIG_CF0_BASE_ADDR 0xb4000000 /* Boot only */ -#define CONFIG_CF1_BASE_ADDR 0xb8000000 - -#define IRQ_CF1 9 /* CF1 */ -#define IRQ_CF0 10 /* CF0 */ +#define IRQ_CF1 9 /* CF1 */ +#define IRQ_CF0 10 /* CF0 */ #define IRQ_INTD 11 /* INTD */ #define IRQ_ETH1 12 /* Ether1 */ #define IRQ_ETH0 13 /* Ether0 */ |