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authorBarry Song <Baohua.Song@csr.com>2012-08-23 04:47:53 +0200
committerBarry Song <Barry.Song@csr.com>2012-09-05 08:46:44 +0200
commit434e1c574cc304eaff630f4e92ed239f7886815f (patch)
tree147f8e8b5c362763f2d0493cb610ddbe622856cd
parentARM: PRIMA2: add missing interrupts property for pinctrl node (diff)
downloadlinux-434e1c574cc304eaff630f4e92ed239f7886815f.tar.xz
linux-434e1c574cc304eaff630f4e92ed239f7886815f.zip
ARM: PRIMA2: rename prima2-cb.dts to prima2.dtsi as it only has SoC features
The current prima2-cb.dts only includes prima2 SoC feature without board- specific descriptions. This patches rename it to dtsi and clean some useless content. Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/prima2.dtsi (renamed from arch/arm/boot/dts/prima2-cb.dts)22
1 files changed, 10 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/prima2-cb.dts b/arch/arm/boot/dts/prima2.dtsi
index 4245306d60e1..1b716aae64f7 100644
--- a/arch/arm/boot/dts/prima2-cb.dts
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -1,20 +1,18 @@
-/dts-v1/;
+/*
+ * DTS file for CSR SiRFprimaII SoC
+ *
+ * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/include/ "skeleton.dtsi"
/ {
- model = "SiRF Prima2 eVB";
- compatible = "sirf,prima2-cb", "sirf,prima2";
+ compatible = "sirf,prima2";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
- memory {
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
- linux,stdout-path = &uart1;
- };
-
cpus {
#address-cells = <1>;
#size-cells = <0>;