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authorMaxime Ripard <maxime.ripard@free-electrons.com>2015-01-19 14:01:14 +0100
committerGregory CLEMENT <gregory.clement@free-electrons.com>2015-03-18 11:55:49 +0100
commit7776ab70d75ff9857343e44e428744d81c30ce1b (patch)
tree6920f7f0acafff21f71e00b1de5403b44e448010
parentARM: mvebu: Enable Performance Monitor Unit on Armada 380/385 SoC (diff)
downloadlinux-7776ab70d75ff9857343e44e428744d81c30ce1b.tar.xz
linux-7776ab70d75ff9857343e44e428744d81c30ce1b.zip
ARM: mvebu: armada-385-ap: Enable USB3 port
The Armada 385 AP board has a USB3 port exposed that uses a GPIO to drive the VBUS line. Enable the needed drivers to support this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/armada-385-db-ap.dts28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
index d6b0f7db9624..7219ac3a3d90 100644
--- a/arch/arm/boot/dts/armada-385-db-ap.dts
+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
@@ -125,6 +125,13 @@
status = "okay";
};
+ pinctrl@18000 {
+ xhci0_vbus_pins: xhci0-vbus-pins {
+ marvell,pins = "mpp44";
+ marvell,function = "gpio";
+ };
+ };
+
ethernet@30000 {
status = "okay";
phy = <&phy2>;
@@ -162,6 +169,11 @@
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
};
+
+ usb3@f0000 {
+ status = "okay";
+ usb-phy = <&usb3_phy>;
+ };
};
pcie-controller {
@@ -187,4 +199,20 @@
};
};
};
+
+ usb3_phy: usb3_phy {
+ compatible = "usb-nop-xceiv";
+ vcc-supply = <&reg_xhci0_vbus>;
+ };
+
+ reg_xhci0_vbus: xhci0-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&xhci0_vbus_pins>;
+ regulator-name = "xhci0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ };
};