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authorWill Deacon <will.deacon@arm.com>2013-09-19 20:06:46 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2013-09-20 18:04:28 +0200
commit8f4c344696b9f9f8471d7f342076ef10ed7f66a5 (patch)
tree5266f6e86c81f6694f75e77c84c64a55123b04b1
parentMerge tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cma... (diff)
downloadlinux-8f4c344696b9f9f8471d7f342076ef10ed7f66a5.tar.xz
linux-8f4c344696b9f9f8471d7f342076ef10ed7f66a5.zip
lockref: use cmpxchg64 explicitly for lockless updates
The cmpxchg() function tends not to support 64-bit arguments on 32-bit architectures. This could be either due to use of unsigned long arguments (like on ARM) or lack of instruction support (cmpxchgq on x86). However, these architectures may implement a specific cmpxchg64() function to provide 64-bit cmpxchg support instead. Since the lockref code requires a 64-bit cmpxchg and relies on the architecture selecting ARCH_USE_CMPXCHG_LOCKREF, move to using cmpxchg64 instead of cmpxchg and allow 32-bit architectures to make use of the lockless lockref implementation. Cc: Waiman Long <Waiman.Long@hp.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--lib/lockref.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/lockref.c b/lib/lockref.c
index e2cd2c0a8821..677d036cf3c7 100644
--- a/lib/lockref.c
+++ b/lib/lockref.c
@@ -14,8 +14,8 @@
while (likely(arch_spin_value_unlocked(old.lock.rlock.raw_lock))) { \
struct lockref new = old, prev = old; \
CODE \
- old.lock_count = cmpxchg(&lockref->lock_count, \
- old.lock_count, new.lock_count); \
+ old.lock_count = cmpxchg64(&lockref->lock_count, \
+ old.lock_count, new.lock_count); \
if (likely(old.lock_count == prev.lock_count)) { \
SUCCESS; \
} \