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author | Mike Wolf <mjw@linux.vnet.ibm.com> | 2007-07-10 20:13:47 +0200 |
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committer | Paul Mackerras <paulus@samba.org> | 2007-07-11 05:21:46 +0200 |
commit | 31a12cece7c71c47e61ab8ed45bbff5aac4c1931 (patch) | |
tree | 221d8e6f8206f50912b7c4fff429706a31d892ff | |
parent | [POWERPC] Enable arbitary speed tty ioctls and split input/output speed (diff) | |
download | linux-31a12cece7c71c47e61ab8ed45bbff5aac4c1931.tar.xz linux-31a12cece7c71c47e61ab8ed45bbff5aac4c1931.zip |
[POWERPC] Oprofile support for Power 5++
This adds a new oprofile cpu type for Power 5 revision 3 chips.
The new name is ppc64/power5++ and is used so that the performance
counters can be set up correctly.
Signed-off-by: Mike Wolf <mjw@us.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 157e6e3d237b..b1f8000952f3 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -294,6 +294,21 @@ static struct cpu_spec cpu_specs[] = { .oprofile_mmcra_sipr = MMCRA_SIPR, .platform = "power5", }, + { /* Power5++ */ + .pvr_mask = 0xffffff00, + .pvr_value = 0x003b0300, + .cpu_name = "POWER5+ (gs)", + .cpu_features = CPU_FTRS_POWER5, + .cpu_user_features = COMMON_USER_POWER5_PLUS, + .icache_bsize = 128, + .dcache_bsize = 128, + .num_pmcs = 6, + .oprofile_cpu_type = "ppc64/power5++", + .oprofile_type = PPC_OPROFILE_POWER4, + .oprofile_mmcra_sihv = MMCRA_SIHV, + .oprofile_mmcra_sipr = MMCRA_SIPR, + .platform = "power5+", + }, { /* Power5 GS */ .pvr_mask = 0xffff0000, .pvr_value = 0x003b0000, |