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| author | Zenghui Yu <yuzenghui@huawei.com> | 2019-09-18 08:57:30 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-09-18 12:42:23 +0200 |
| commit | c107d613f9204ff9c7624c229938153d7492c56e (patch) | |
| tree | a9f011174cd6864a2338ac13a9ff671bbac52394 | |
| parent | irqchip/atmel-aic5: Add support for sam9x60 irqchip (diff) | |
| download | linux-c107d613f9204ff9c7624c229938153d7492c56e.tar.xz linux-c107d613f9204ff9c7624c229938153d7492c56e.zip | |
irqchip/gic-v3: Fix GIC_LINE_NR accessor
As per GIC spec, ITLinesNumber indicates the maximum SPI INTID that
the GIC implementation supports. And the maximum SPI INTID an
implementation might support is 1019 (field value 11111).
max(GICD_TYPER_SPIS(...), 1020) is not what we actually want for
GIC_LINE_NR. Fix it to min(GICD_TYPER_SPIS(...), 1020).
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1568789850-14080-1-git-send-email-yuzenghui@huawei.com
| -rw-r--r-- | drivers/irqchip/irq-gic-v3.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 422664ac5f53..1edc99335a94 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -59,7 +59,7 @@ static struct gic_chip_data gic_data __read_mostly; static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key); #define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer)) -#define GIC_LINE_NR max(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U) +#define GIC_LINE_NR min(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U) #define GIC_ESPI_NR GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer) /* |