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author | Michal Simek <michal.simek@xilinx.com> | 2015-07-27 16:13:34 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2015-07-31 10:46:34 +0200 |
commit | f49310dc62f68ae9f905f9a1e42224fa23867f47 (patch) | |
tree | 03c05dc76e2abc1954a94af8634df2ce5dc9a851 | |
parent | ARM64: zynqmp: Move uart and ttcs to the right location (diff) | |
download | linux-f49310dc62f68ae9f905f9a1e42224fa23867f47.tar.xz linux-f49310dc62f68ae9f905f9a1e42224fa23867f47.zip |
ARM64: zynqmp: Move SPI nodes to the right location
Keep nodes sorted.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 9e3d3b9c8c68..857eda5c7217 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -184,30 +184,6 @@ #size-cells = <0>; }; - spi0: spi@ff040000 { - compatible = "cdns,spi-r1p6"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 19 4>; - reg = <0x0 0xff040000 0x1000>; - clock-names = "ref_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@ff050000 { - compatible = "cdns,spi-r1p6"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 20 4>; - reg = <0x0 0xff050000 0x1000>; - clock-names = "ref_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; - #address-cells = <1>; - #size-cells = <0>; - }; - i2c_clk: i2c_clk { compatible = "fixed-clock"; #clock-cells = <0x0>; @@ -283,6 +259,30 @@ <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>; }; + spi0: spi@ff040000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 19 4>; + reg = <0x0 0xff040000 0x1000>; + clock-names = "ref_clk", "pclk"; + clocks = <&misc_clk &misc_clk>; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@ff050000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 20 4>; + reg = <0x0 0xff050000 0x1000>; + clock-names = "ref_clk", "pclk"; + clocks = <&misc_clk &misc_clk>; + #address-cells = <1>; + #size-cells = <0>; + }; + ttc0: timer@ff110000 { compatible = "cdns,ttc"; status = "disabled"; |