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| author | Alexander Couzens <lynxis@fe80.eu> | 2017-05-02 11:47:36 +0200 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-05-15 12:00:46 +0200 |
| commit | 19d8ccc42b148d75284a3809f1eb1eba13a81677 (patch) | |
| tree | 542d197b3b62436ab90b0015821f3573e53abdf5 | |
| parent | mtd: nand: jz4780: Use mtd_set_ooblayout() to set the ooblayout (diff) | |
| download | linux-19d8ccc42b148d75284a3809f1eb1eba13a81677.tar.xz linux-19d8ccc42b148d75284a3809f1eb1eba13a81677.zip | |
mtd: nand: davinci: set ECC algorithm explicitly for HW based ECC
If ECC strength is 4bits/512bytes the algorithm of the ECC engine is
BCH, otherwise (1bit/512bytes) Hamming is used.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| -rw-r--r-- | drivers/mtd/nand/davinci_nand.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index 531c51991e57..7b26e53b95b1 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -771,11 +771,14 @@ static int nand_davinci_probe(struct platform_device *pdev) info->chip.ecc.hwctl = nand_davinci_hwctl_4bit; info->chip.ecc.bytes = 10; info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK; + info->chip.ecc.algo = NAND_ECC_BCH; } else { + /* 1bit ecc hamming */ info->chip.ecc.calculate = nand_davinci_calculate_1bit; info->chip.ecc.correct = nand_davinci_correct_1bit; info->chip.ecc.hwctl = nand_davinci_hwctl_1bit; info->chip.ecc.bytes = 3; + info->chip.ecc.algo = NAND_ECC_HAMMING; } info->chip.ecc.size = 512; info->chip.ecc.strength = pdata->ecc_bits; |