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| author | Madhavan Srinivasan <maddy@linux.vnet.ibm.com> | 2017-02-12 18:03:15 +0100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-02-17 11:48:54 +0100 |
| commit | 8d911904f3ce412b20874a9c95f82009dcbb007c (patch) | |
| tree | cf55b2971dbb391e076d5bb3bfd3e97f835fc905 | |
| parent | powerpc/perf: Use Instruction Counter value (diff) | |
| download | linux-8d911904f3ce412b20874a9c95f82009dcbb007c.tar.xz linux-8d911904f3ce412b20874a9c95f82009dcbb007c.zip | |
powerpc/perf: Add restrictions to PMC5 in power9 DD1
PMC5 on POWER9 DD1 may not provide right counts in all
sampling scenarios, hence use PM_INST_DISP event instead
in PMC2 or PMC3 in preference.
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| -rw-r--r-- | arch/powerpc/perf/isa207-common.h | 4 | ||||
| -rw-r--r-- | arch/powerpc/perf/power9-pmu.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h index 3e9150f6690a..cf9bd8990159 100644 --- a/arch/powerpc/perf/isa207-common.h +++ b/arch/powerpc/perf/isa207-common.h @@ -222,6 +222,10 @@ CNST_PMC_VAL(1) | CNST_PMC_VAL(2) | CNST_PMC_VAL(3) | \ CNST_PMC_VAL(4) | CNST_PMC_VAL(5) | CNST_PMC_VAL(6) | CNST_NC_VAL +/* + * Lets restrict use of PMC5 for instruction counting. + */ +#define P9_DD1_TEST_ADDER (ISA207_TEST_ADDER | CNST_PMC_VAL(5)) /* Bits in MMCR1 for PowerISA v2.07 */ #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c index 454e9f70894f..5fe9cb1dc3b6 100644 --- a/arch/powerpc/perf/power9-pmu.c +++ b/arch/powerpc/perf/power9-pmu.c @@ -423,7 +423,7 @@ static struct power_pmu power9_pmu = { .name = "POWER9", .n_counter = MAX_PMU_COUNTERS, .add_fields = ISA207_ADD_FIELDS, - .test_adder = ISA207_TEST_ADDER, + .test_adder = P9_DD1_TEST_ADDER, .compute_mmcr = isa207_compute_mmcr, .config_bhrb = power9_config_bhrb, .bhrb_filter_map = power9_bhrb_filter_map, |