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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2012-11-22 20:10:45 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-01-25 11:12:36 +0100 |
| commit | 8a1a9540384e06ca94296ec571f42ebcdc6c33ce (patch) | |
| tree | d50936e7917f37cd0f0f2e5e4151b469db0997f9 | |
| parent | ARM: Let CONFIG_MACH_IMX31_DT be built by default (diff) | |
| download | linux-8a1a9540384e06ca94296ec571f42ebcdc6c33ce.tar.xz linux-8a1a9540384e06ca94296ec571f42ebcdc6c33ce.zip | |
ARM: clk-imx31: Add dummy clock
Add dummy clock as it is required by some i.mx drivers.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/mach-imx/clk-imx31.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index 8be64e0a4ace..590dd876d66a 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -34,8 +34,8 @@ static const char *csi_sel[] = { "upll", "spll", }; static const char *fir_sel[] = { "mcu_main", "upll", "spll" }; enum mx31_clks { - ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, per_div, - per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre, + dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, + per_div, per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre, fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate, iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate, uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate, @@ -52,6 +52,7 @@ int __init mx31_clocks_init(unsigned long fref) void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR); int i; + clk[dummy] = imx_clk_fixed("dummy", 0); clk[ckih] = imx_clk_fixed("ckih", fref); clk[ckil] = imx_clk_fixed("ckil", 32768); clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL); |