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authorPrabhakar Kushwaha <prabhakar@freescale.com>2012-08-15 17:13:52 +0200
committerKumar Gala <galak@kernel.crashing.org>2012-09-12 21:57:10 +0200
commitf4dfef75adb12fec7693d0c469e2de6c7d45e975 (patch)
tree846c43404e04f1d1e6affc5a59c84837a2edd0c6
parentpowerpc/e5500: Add Power ISA properties to comply with ePAPR 1.1 (diff)
downloadlinux-f4dfef75adb12fec7693d0c469e2de6c7d45e975.tar.xz
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powerpc: Update Integrated Flash controller device tree bindings
Freescale's Integrated Flash controller (IFC) may have one or two interrupts. In case of single interrupt line, it will cover all IFC interrupts. Update this information in IFC device tree bindings Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/ifc.txt9
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt b/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt
index 939a26d541f6..d5e370450ac0 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt
@@ -12,9 +12,12 @@ Properties:
- #size-cells : Either one or two, depending on how large each chipselect
can be.
- reg : Offset and length of the register set for the device
-- interrupts : IFC has two interrupts. The first one is the "common"
- interrupt(CM_EVTER_STAT), and second is the NAND interrupt
- (NAND_EVTER_STAT).
+- interrupts: IFC may have one or two interrupts. If two interrupt
+ specifiers are present, the first is the "common"
+ interrupt (CM_EVTER_STAT), and the second is the NAND
+ interrupt (NAND_EVTER_STAT). If there is only one,
+ that interrupt reports both types of event.
+
- ranges : Each range corresponds to a single chipselect, and covers
the entire access window as configured.