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authorChristoffer Dall <christoffer.dall@linaro.org>2015-08-30 14:45:20 +0200
committerChristoffer Dall <christoffer.dall@linaro.org>2015-10-22 23:01:43 +0200
commit54723bb37feac347a169359536f3dff122cabca3 (patch)
tree80f6593a7634deb7b0c28cb2c8d7e3e303b3395c
parentarm/arm64: KVM: Implement GICD_ICFGR as RO for PPIs (diff)
downloadlinux-54723bb37feac347a169359536f3dff122cabca3.tar.xz
linux-54723bb37feac347a169359536f3dff122cabca3.zip
arm/arm64: KVM: Use appropriate define in VGIC reset code
We currently initialize the SGIs to be enabled in the VGIC code, but we use the VGIC_NR_PPIS define for this purpose, instead of the the more natural VGIC_NR_SGIS. Change this slightly confusing use of the defines. Note: This should have no functional change, as both names are defined to the number 16. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
-rw-r--r--virt/kvm/arm/vgic.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index f8ca2e9d2f0b..a44ecf9eca4e 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -2128,8 +2128,12 @@ int vgic_init(struct kvm *kvm)
break;
}
- for (i = 0; i < dist->nr_irqs; i++) {
- if (i < VGIC_NR_PPIS)
+ /*
+ * Enable all SGIs and configure all private IRQs as
+ * edge-triggered.
+ */
+ for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
+ if (i < VGIC_NR_SGIS)
vgic_bitmap_set_irq_val(&dist->irq_enabled,
vcpu->vcpu_id, i, 1);
if (i < VGIC_NR_PRIVATE_IRQS)