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author | Anson Huang <Anson.Huang@nxp.com> | 2019-06-13 05:35:22 +0200 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2019-06-18 09:14:39 +0200 |
commit | 770856f0da5d4282942df83a928fdcb662417331 (patch) | |
tree | 4e3afa27d1a0e8d70a0d9957a253c4a6cfb074be | |
parent | ARM: dts: imx53: Bind CPLD on M53Menlo (diff) | |
download | linux-770856f0da5d4282942df83a928fdcb662417331.tar.xz linux-770856f0da5d4282942df83a928fdcb662417331.zip |
ARM: dts: imx6qdl: Enable SNVS power key according to board design
The SNVS power key depends on board design, by default it should
be disabled in SoC DT and ONLY be enabled on board DT if it is
wired up.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 11103a4e40e2..71ca76a5e4a5 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -761,6 +761,10 @@ status = "okay"; }; +&snvs_pwrkey { + status = "okay"; +}; + &ssi2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 929fc7db7fde..4b801935cad1 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -841,6 +841,7 @@ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; linux,keycode = <KEY_POWER>; wakeup-source; + status = "disabled"; }; snvs_lpgpr: snvs-lpgpr { |