summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJeremy McDermond <nh6z@nh6z.net>2016-04-19 18:59:04 +0200
committerMark Brown <broonie@kernel.org>2016-04-19 19:13:05 +0200
commit041f9d336f28d3a45b31799bb8b5b2e1fa322321 (patch)
treebad8f7c4565f2f34f6df74cd01362e6218fec304
parentASoC: tlv320aic32x4: Add SPI support (diff)
downloadlinux-041f9d336f28d3a45b31799bb8b5b2e1fa322321.tar.xz
linux-041f9d336f28d3a45b31799bb8b5b2e1fa322321.zip
ASoC: tlv320aic32x4: Add 96k sample rate
The TLV320AIC32x4 series supports 96ksps rates in hardware. This patch adds the necessary PLL divider values and clock settings to the table to make 96ksps work. Signed-off-by: Jeremy McDermond <nh6z@nh6z.net> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/codecs/tlv320aic32x4.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c
index c6b6d551f4fe..2f8480c93b3c 100644
--- a/sound/soc/codecs/tlv320aic32x4.c
+++ b/sound/soc/codecs/tlv320aic32x4.c
@@ -159,7 +159,10 @@ static const struct aic32x4_rate_divs aic32x4_divs[] = {
/* 48k rate */
{AIC32X4_FREQ_12000000, 48000, 1, 8, 1920, 128, 2, 8, 128, 2, 8, 4},
{AIC32X4_FREQ_24000000, 48000, 2, 8, 1920, 128, 8, 2, 64, 8, 4, 4},
- {AIC32X4_FREQ_25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4}
+ {AIC32X4_FREQ_25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4},
+
+ /* 96k rate */
+ {AIC32X4_FREQ_25000000, 96000, 2, 7, 8643, 64, 4, 4, 64, 4, 4, 1},
};
static const struct snd_kcontrol_new hpl_output_mixer_controls[] = {
@@ -564,7 +567,7 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
-#define AIC32X4_RATES SNDRV_PCM_RATE_8000_48000
+#define AIC32X4_RATES SNDRV_PCM_RATE_8000_96000
#define AIC32X4_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \
| SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)