diff options
author | Phoebe Buckheister <phoebe.buckheister@itwm.fraunhofer.de> | 2014-02-17 11:34:09 +0100 |
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committer | David S. Miller <davem@davemloft.net> | 2014-02-17 22:42:38 +0100 |
commit | 643e53c20a6ae78149f75861f260d0ca6d9a17e3 (patch) | |
tree | 62fdb375253d089447810678a015e4287ce824ac | |
parent | ieee802154: add TX power control to wpan_phy (diff) | |
download | linux-643e53c20a6ae78149f75861f260d0ca6d9a17e3.tar.xz linux-643e53c20a6ae78149f75861f260d0ca6d9a17e3.zip |
ieee802154: support 100kbps QPSK/EU in at86rf230
The standard assigns channel 0 on page 2 to be 100kbps QPSK in the
868.3MHz band. Add support to the at86rf230 driver for this channel and
page, at the moment predicated only for the RF212 chip.
Per the datasheet, configurations for page 0, channels 0 to 10 and page
2, channels 0 to 10 differ only in the BPSK_QPSK bit. Support for
channels 1 to 10 is untested.
Signed-off-by: Phoebe Buckheister <phoebe.buckheister@itwm.fraunhofer.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ieee802154/at86rf230.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/net/ieee802154/at86rf230.c b/drivers/net/ieee802154/at86rf230.c index 9afb4b9d7c93..04a995dad593 100644 --- a/drivers/net/ieee802154/at86rf230.c +++ b/drivers/net/ieee802154/at86rf230.c @@ -106,7 +106,8 @@ static inline int is_rf212(struct at86rf230_local *local) #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0 #define SR_SUB_MODE 0x0c, 0x04, 2 #define SR_BPSK_QPSK 0x0c, 0x08, 3 -#define SR_RESERVED_0c_4 0x0c, 0x70, 4 +#define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4 +#define SR_RESERVED_0c_5 0x0c, 0x60, 5 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7 #define RG_ANT_DIV (0x0d) #define SR_ANT_CTRL 0x0d, 0x03, 0 @@ -594,6 +595,13 @@ at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel) if (rc < 0) return rc; + if (page == 0) + rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0); + else + rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1); + if (rc < 0) + return rc; + return at86rf230_write_subreg(lp, SR_CHANNEL, channel); } @@ -620,6 +628,7 @@ at86rf230_channel(struct ieee802154_dev *dev, int page, int channel) msleep(1); /* Wait for PLL */ dev->phy->current_channel = channel; + dev->phy->current_page = page; return 0; } @@ -1064,10 +1073,12 @@ static int at86rf230_probe(struct spi_device *spi) spi_set_drvdata(spi, lp); - if (is_rf212(lp)) + if (is_rf212(lp)) { dev->phy->channels_supported[0] = 0x00007FF; - else + dev->phy->channels_supported[2] = 0x00007FF; + } else { dev->phy->channels_supported[0] = 0x7FFF800; + } rc = at86rf230_hw_init(lp); if (rc) |