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| author | Yannick Fertre <yannick.fertre@st.com> | 2017-04-14 12:13:33 +0200 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2017-04-14 20:30:28 +0200 |
| commit | 7121926d4ca5869b730da760c1fdf3dc1d723224 (patch) | |
| tree | ce290e8fb783540dddf6c530fae775ec639eca03 | |
| parent | drm/fb-cma-helper: Add drm_fb_cma_get_gem_addr() (diff) | |
| download | linux-7121926d4ca5869b730da760c1fdf3dc1d723224.tar.xz linux-7121926d4ca5869b730da760c1fdf3dc1d723224.zip | |
dt-bindings: display: Add STM32 LTDC driver
This patch adds documentation of device tree bindings for the STM32 LTDC
(Lcd-Tft Display Controller).
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: http://patchwork.freedesktop.org/patch/msgid/1492164819-10513-4-git-send-email-yannick.fertre@st.com
| -rw-r--r-- | Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt new file mode 100644 index 000000000000..8e1476941c0f --- /dev/null +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt @@ -0,0 +1,36 @@ +* STMicroelectronics STM32 lcd-tft display controller + +- ltdc: lcd-tft display controller host + must be a sub-node of st-display-subsystem + Required properties: + - compatible: "st,stm32-ltdc" + - reg: Physical base address of the IP registers and length of memory mapped region. + - clocks: A list of phandle + clock-specifier pairs, one for each + entry in 'clock-names'. + - clock-names: A list of clock names. For ltdc it should contain: + - "lcd" for the clock feeding the output pixel clock & IP clock. + - resets: reset to be used by the device (defined by use of RCC macro). + Required nodes: + - Video port for RGB output. + +Example: + +/ { + ... + soc { + ... + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F4_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + + port { + ltdc_out_rgb: endpoint { + }; + }; + }; + }; +}; |