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| author | Eugen Hristev <eugen.hristev@microchip.com> | 2021-10-20 11:46:54 +0200 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2021-10-21 13:45:05 +0200 |
| commit | e79c58975c27d58d7683937538bcc6b547e1829d (patch) | |
| tree | 822e7a0a558354f53896bfe68ea554179cd71a88 | |
| parent | ARM: at91: dts: sama5d29: Add dtsi file for sama5d29 (diff) | |
| download | linux-e79c58975c27d58d7683937538bcc6b547e1829d.tar.xz linux-e79c58975c27d58d7683937538bcc6b547e1829d.zip | |
ARM: dts: at91: sama7g5: add rtc node
Add RTC node.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[claudiu.beznea: add sama7g5 compatible as the IP has 2 extra registers
compared with sam9x60]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211020094656.3343242-2-claudiu.beznea@microchip.com
| -rw-r--r-- | arch/arm/boot/dts/sama7g5.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index c9725d080e20..0912219ed5a1 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -130,6 +130,13 @@ reg = <0xe001d060 0x48>; }; + rtc: rtc@e001d0a8 { + compatible = "microchip,sama7g5-rtc", "microchip,sam9x60-rtc"; + reg = <0xe001d0a8 0x30>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk32k 1>; + }; + ps_wdt: watchdog@e001d180 { compatible = "microchip,sama7g5-wdt"; reg = <0xe001d180 0x24>; |