diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2007-09-17 18:11:07 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-09-19 20:33:14 +0200 |
| commit | 09abbcffb3ee63fb8712c008df0c6878860777b7 (patch) | |
| tree | a9b9db37c0c50069e733545e1c8bfe4802eb5e17 | |
| parent | [MIPS] DEC: Initialise ioasic_ssr_lock (diff) | |
| download | linux-09abbcffb3ee63fb8712c008df0c6878860777b7.tar.xz linux-09abbcffb3ee63fb8712c008df0c6878860777b7.zip | |
[MIPS] cpu-bugs64.c: GCC 3.3 constraint workaround
Add a workaround to address warnings generated on the "n" constraint by
GCC 3.3 and below.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/kernel/cpu-bugs64.c | 4 | ||||
| -rw-r--r-- | include/asm-mips/compiler.h | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index ac04f0adc408..6648fde20b96 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2003, 2004 Maciej W. Rozycki + * Copyright (C) 2003, 2004, 2007 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -29,7 +29,7 @@ static inline void align_mod(const int align, const int mod) ".endr\n\t" ".set pop" : - : "rn" (align), "rn" (mod)); + : GCC_IMM_ASM (align), GCC_IMM_ASM (mod)); } static inline void mult_sh_align_mod(long *v1, long *v2, long *w, diff --git a/include/asm-mips/compiler.h b/include/asm-mips/compiler.h index 169ae26105e9..aa6b876bbd78 100644 --- a/include/asm-mips/compiler.h +++ b/include/asm-mips/compiler.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2004 Maciej W. Rozycki + * Copyright (C) 2004, 2007 Maciej W. Rozycki * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -9,8 +9,10 @@ #define _ASM_COMPILER_H #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) +#define GCC_IMM_ASM "n" #define GCC_REG_ACCUM "$0" #else +#define GCC_IMM_ASM "rn" #define GCC_REG_ACCUM "accum" #endif |