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| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-10-17 17:57:07 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-17 19:28:49 +0200 |
| commit | 9ee5389c58d7e74ae06887541fbb0ff6ecc6a499 (patch) | |
| tree | da9715fa4b6f8e43f84a2309501120bd9fa17e3b | |
| parent | [MIPS] Alchemy: Renumber interrupts so irq_cpu can work. (diff) | |
| download | linux-9ee5389c58d7e74ae06887541fbb0ff6ecc6a499.tar.xz linux-9ee5389c58d7e74ae06887541fbb0ff6ecc6a499.zip | |
[MIPS] Sibyte: Fix typos in sibyte clockevent drivers
Fix some typo introduced on clockevent conversion.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/sibyte/bcm1480/time.c | 2 | ||||
| -rw-r--r-- | arch/mips/sibyte/sb1250/time.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c index 40d7126cd5bf..5b4bfbbb5a24 100644 --- a/arch/mips/sibyte/bcm1480/time.c +++ b/arch/mips/sibyte/bcm1480/time.c @@ -84,7 +84,7 @@ static void sibyte_set_mode(enum clock_event_mode mode, void __iomem *timer_cfg, *timer_init; timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); - timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); + timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c index 38199ad8fc54..fe11fed8e0d7 100644 --- a/arch/mips/sibyte/sb1250/time.c +++ b/arch/mips/sibyte/sb1250/time.c @@ -83,7 +83,7 @@ static void sibyte_set_mode(enum clock_event_mode mode, void __iomem *timer_cfg, *timer_init; timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); - timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); + timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); switch(mode) { case CLOCK_EVT_MODE_PERIODIC: @@ -111,7 +111,7 @@ sibyte_next_event(unsigned long delta, struct clock_event_device *evt) void __iomem *timer_cfg, *timer_init; timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); - timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); + timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); __raw_writeq(0, timer_cfg); __raw_writeq(delta, timer_init); @@ -155,7 +155,7 @@ static void sibyte_set_mode(enum clock_event_mode mode, void __iomem *timer_cfg, *timer_init; timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); - timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); + timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: @@ -183,7 +183,7 @@ sibyte_next_event(unsigned long delta, struct clock_event_device *evt) void __iomem *timer_cfg, *timer_init; timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); - timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); + timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); __raw_writeq(0, timer_cfg); __raw_writeq(delta, timer_init); |