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authorRabin Vincent <rabin@rab.in>2010-11-30 17:36:48 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-12-04 12:30:27 +0100
commited60453fa8f8fc3d034dfdf10371a99cc6905626 (patch)
tree54a67cc7e01481c7b11b5c077a784149b8ad7979
parentARM: 6509/1: ftrace: ignore any ftrace.o in C version of recordmcount (diff)
downloadlinux-ed60453fa8f8fc3d034dfdf10371a99cc6905626.tar.xz
linux-ed60453fa8f8fc3d034dfdf10371a99cc6905626.zip
ARM: 6511/1: ftrace: add ARM support for C version of recordmcount
Depending on the compiler version, ARM GCC calls the mcount function either __gnu_mcount_nc or mcount. Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--scripts/recordmcount.c5
-rw-r--r--scripts/recordmcount.h5
3 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index db524e75c4a2..a7b9070b661e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -23,6 +23,7 @@ config ARM
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
+ select HAVE_C_RECORDMCOUNT
help
The ARM series is a line of low-power-consumption RISC chip designs
licensed by ARM Ltd and targeted at embedded applications and
diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c
index ac6e51ceed50..038b3d1e2981 100644
--- a/scripts/recordmcount.c
+++ b/scripts/recordmcount.c
@@ -38,6 +38,7 @@ static void *ehdr_curr; /* current ElfXX_Ehdr * for resource cleanup */
static char gpfx; /* prefix for global symbol name (sometimes '_') */
static struct stat sb; /* Remember .st_size, etc. */
static jmp_buf jmpenv; /* setjmp/longjmp per-file error escape */
+static const char *altmcount; /* alternate mcount symbol name */
/* setjmp() return values */
enum {
@@ -299,7 +300,9 @@ do_file(char const *const fname)
fail_file();
} break;
case EM_386: reltype = R_386_32; break;
- case EM_ARM: reltype = R_ARM_ABS32; break;
+ case EM_ARM: reltype = R_ARM_ABS32;
+ altmcount = "__gnu_mcount_nc";
+ break;
case EM_IA_64: reltype = R_IA64_IMM64; gpfx = '_'; break;
case EM_MIPS: /* reltype: e_class */ gpfx = '_'; break;
case EM_PPC: reltype = R_PPC_ADDR32; gpfx = '_'; break;
diff --git a/scripts/recordmcount.h b/scripts/recordmcount.h
index 58e933a20544..8087bc8cd2d1 100644
--- a/scripts/recordmcount.h
+++ b/scripts/recordmcount.h
@@ -275,11 +275,12 @@ static uint_t *sift_rel_mcount(uint_t *mlocp,
Elf_Sym const *const symp =
&sym0[Elf_r_sym(relp)];
char const *symname = &str0[w(symp->st_name)];
+ char const *mcount = '_' == gpfx ? "_mcount" : "mcount";
if ('.' == symname[0])
++symname; /* ppc64 hack */
- if (0 == strcmp((('_' == gpfx) ? "_mcount" : "mcount"),
- symname))
+ if (0 == strcmp(mcount, symname) ||
+ (altmcount && 0 == strcmp(altmcount, symname)))
mcountsym = Elf_r_sym(relp);
}