diff options
| author | Gil Fine <gil.fine@intel.com> | 2021-12-17 02:16:44 +0100 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2021-12-28 08:43:56 +0100 |
| commit | fa487b2a900d7b22fe7db678d2134fbf56ae9da0 (patch) | |
| tree | cd97f714ada8f4e3ecfaaa31975b7be0d20d2758 | |
| parent | thunderbolt: Enable CL0s for Intel Titan Ridge (diff) | |
| download | linux-fa487b2a900d7b22fe7db678d2134fbf56ae9da0.tar.xz linux-fa487b2a900d7b22fe7db678d2134fbf56ae9da0.zip | |
thunderbolt: Add module parameter for CLx disabling
Add a module parameter that allows user to completely disable CLx
functionality in case problems are found.
Signed-off-by: Gil Fine <gil.fine@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| -rw-r--r-- | drivers/thunderbolt/switch.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index e7dc54d3ea99..d026e305fe5d 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -13,6 +13,7 @@ #include <linux/sched/signal.h> #include <linux/sizes.h> #include <linux/slab.h> +#include <linux/module.h> #include "tb.h" @@ -26,6 +27,10 @@ struct nvm_auth_status { u32 status; }; +static bool clx_enabled = true; +module_param_named(clx, clx_enabled, bool, 0444); +MODULE_PARM_DESC(clx, "allow low power states on the high-speed lanes (default: true)"); + /* * Hold NVM authentication failure status per switch This information * needs to stay around even when the switch gets power cycled so we @@ -3478,6 +3483,9 @@ int tb_switch_enable_clx(struct tb_switch *sw, enum tb_clx clx) { struct tb_switch *root_sw = sw->tb->root_switch; + if (!clx_enabled) + return 0; + /* * CLx is not enabled and validated on Intel USB4 platforms before * Alder Lake. @@ -3539,6 +3547,9 @@ static int tb_switch_disable_cl0s(struct tb_switch *sw) */ int tb_switch_disable_clx(struct tb_switch *sw, enum tb_clx clx) { + if (!clx_enabled) + return 0; + switch (clx) { case TB_CL0S: return tb_switch_disable_cl0s(sw); |