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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-01-22 08:22:10 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-01-22 08:22:10 +0100 |
| commit | b21bae9af1da9b319b5f52ca8fcda76a26cd175a (patch) | |
| tree | 37f8b04a5433b3a3eadaf94232e8ac820e096e15 | |
| parent | Merge tag 'docs-5.17-2' of git://git.lwn.net/linux (diff) | |
| parent | arm64: mm: apply __ro_after_init to memory_limit (diff) | |
| download | linux-b21bae9af1da9b319b5f52ca8fcda76a26cd175a.tar.xz linux-b21bae9af1da9b319b5f52ca8fcda76a26cd175a.zip | |
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes/cleanups from Catalin Marinas:
"Some fixes that turned up during the merge window:
- Add brackets to the io_stop_wc macro
- Avoid -Warray-bounds warning with the LSE atomics inline asm
- Apply __ro_after_init to memory_limit"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: mm: apply __ro_after_init to memory_limit
arm64: atomics: lse: Dereference matching size
asm-generic: Add missing brackets for io_stop_wc macro
| -rw-r--r-- | arch/arm64/include/asm/atomic_lse.h | 2 | ||||
| -rw-r--r-- | arch/arm64/include/asm/cmpxchg.h | 2 | ||||
| -rw-r--r-- | arch/arm64/mm/init.c | 2 | ||||
| -rw-r--r-- | include/asm-generic/barrier.h | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h index d955ade5df7c..5d460f6b7675 100644 --- a/arch/arm64/include/asm/atomic_lse.h +++ b/arch/arm64/include/asm/atomic_lse.h @@ -249,7 +249,7 @@ __lse__cmpxchg_case_##name##sz(volatile void *ptr, \ " mov %" #w "[tmp], %" #w "[old]\n" \ " cas" #mb #sfx "\t%" #w "[tmp], %" #w "[new], %[v]\n" \ " mov %" #w "[ret], %" #w "[tmp]" \ - : [ret] "+r" (x0), [v] "+Q" (*(unsigned long *)ptr), \ + : [ret] "+r" (x0), [v] "+Q" (*(u##sz *)ptr), \ [tmp] "=&r" (tmp) \ : [old] "r" (x1), [new] "r" (x2) \ : cl); \ diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h index f9bef42c1411..497acf134d99 100644 --- a/arch/arm64/include/asm/cmpxchg.h +++ b/arch/arm64/include/asm/cmpxchg.h @@ -243,7 +243,7 @@ static inline void __cmpwait_case_##sz(volatile void *ptr, \ " cbnz %" #w "[tmp], 1f\n" \ " wfe\n" \ "1:" \ - : [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr) \ + : [tmp] "=&r" (tmp), [v] "+Q" (*(u##sz *)ptr) \ : [val] "r" (val)); \ } diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index a8834434af99..db63cc885771 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -172,7 +172,7 @@ int pfn_is_map_memory(unsigned long pfn) } EXPORT_SYMBOL(pfn_is_map_memory); -static phys_addr_t memory_limit = PHYS_ADDR_MAX; +static phys_addr_t memory_limit __ro_after_init = PHYS_ADDR_MAX; /* * Limit the memory size that was specified via FDT. diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h index 3d503e74037f..fd7e8fbaeef1 100644 --- a/include/asm-generic/barrier.h +++ b/include/asm-generic/barrier.h @@ -285,7 +285,7 @@ do { \ * write-combining memory accesses before this macro with those after it. */ #ifndef io_stop_wc -#define io_stop_wc do { } while (0) +#define io_stop_wc() do { } while (0) #endif #endif /* !__ASSEMBLY__ */ |