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author | Adam Jackson <ajax@redhat.com> | 2010-07-16 20:46:30 +0200 |
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committer | Eric Anholt <eric@anholt.net> | 2010-08-02 04:38:04 +0200 |
commit | d6d952689a48375afb97f619f77d548f16d45a92 (patch) | |
tree | 0dff71af6d9c5e2f49a1319597599416c2b723de | |
parent | drm/i915: Initialize LVDS and eDP outputs before anything else (diff) | |
download | linux-d6d952689a48375afb97f619f77d548f16d45a92.tar.xz linux-d6d952689a48375afb97f619f77d548f16d45a92.zip |
drm/i915/pch: Set transcoder sync polarity for DP based on actual mode
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 82d1b91bdfa6..9a95a27a8464 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1998,9 +1998,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) reg = I915_READ(trans_dp_ctl); reg &= ~TRANS_DP_PORT_SEL_MASK; reg = TRANS_DP_OUTPUT_ENABLE | - TRANS_DP_ENH_FRAMING | - TRANS_DP_VSYNC_ACTIVE_HIGH | - TRANS_DP_HSYNC_ACTIVE_HIGH; + TRANS_DP_ENH_FRAMING; + + if (crtc->mode.flags & DRM_MODE_FLAG_PHSYNC) + reg |= TRANS_DP_HSYNC_ACTIVE_HIGH; + if (crtc->mode.flags & DRM_MODE_FLAG_PVSYNC) + reg |= TRANS_DP_VSYNC_ACTIVE_HIGH; switch (intel_trans_dp_port_sel(crtc)) { case PCH_DP_B: |