diff options
author | Doug Berger <opendmb@gmail.com> | 2023-01-24 21:14:29 +0100 |
---|---|---|
committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2023-01-25 18:54:55 +0100 |
commit | 6cc7a8262b57db0a2ff6c141bb163c1395b7c4ef (patch) | |
tree | ea2632dd55919e0ae3a830a5866ae7c42dc2c5e9 | |
parent | rtc: sun6i: Always export the internal oscillator (diff) | |
download | linux-6cc7a8262b57db0a2ff6c141bb163c1395b7c4ef.tar.xz linux-6cc7a8262b57db0a2ff6c141bb163c1395b7c4ef.zip |
dt-bindings: rtc: brcm,brcmstb-waketimer: add alarm interrupt
A second interrupt can optionally be specified for this device
to be used for generating RTC alarm interrupts.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230124201430.2502371-2-opendmb@gmail.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
-rw-r--r-- | Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml b/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml index 9fe079917a98..c6c57636c729 100644 --- a/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml +++ b/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml @@ -11,7 +11,8 @@ maintainers: description: The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the - ability to wake up the system from low-power suspend/standby modes. + ability to wake up the system from low-power suspend/standby modes and + optionally generate RTC alarm interrupts. allOf: - $ref: "rtc.yaml#" @@ -24,8 +25,14 @@ properties: maxItems: 1 interrupts: - description: the TIMER interrupt - maxItems: 1 + minItems: 1 + items: + - description: the TIMER interrupt + - description: the ALARM interrupt + description: + The TIMER interrupt wakes the system from low-power suspend/standby modes. + An ALARM interrupt may be specified to interrupt the CPU when an RTC alarm + is enabled. clocks: description: clock reference in the 27MHz domain @@ -35,10 +42,10 @@ additionalProperties: false examples: - | - rtc@f0411580 { + rtc@f041a080 { compatible = "brcm,brcmstb-waketimer"; - reg = <0xf0411580 0x14>; - interrupts = <0x3>; - interrupt-parent = <&aon_pm_l2_intc>; + reg = <0xf041a080 0x14>; + interrupts-extended = <&aon_pm_l2_intc 0x04>, + <&upg_aux_aon_intr2_intc 0x08>; clocks = <&upg_fixed>; }; |