diff options
| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2017-03-28 17:42:52 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-04-05 00:58:33 +0200 |
| commit | 93b226f9c65a951a91617f87ba1f05f14e59f26f (patch) | |
| tree | 6a0a321462cbc3c7fd0a48f8cf921c59042fb812 | |
| parent | PCI: imx6: Do not wait for speed change on i.MX7 (diff) | |
| download | linux-93b226f9c65a951a91617f87ba1f05f14e59f26f.tar.xz linux-93b226f9c65a951a91617f87ba1f05f14e59f26f.zip | |
PCI: imx6: Do not switch speed if Gen2 is disabled
Save a bit of time and avoid going through link speed change procedure in
configuration where link max speed is limited to Gen1 in DT.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <dongas86@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
| -rw-r--r-- | drivers/pci/dwc/pci-imx6.c | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c index 793b008553a0..102edcf1e261 100644 --- a/drivers/pci/dwc/pci-imx6.c +++ b/drivers/pci/dwc/pci-imx6.c @@ -533,40 +533,40 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK; tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2; dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp); - } else { - dev_info(dev, "Link: Gen2 disabled\n"); - } - - /* - * Start Directed Speed Change so the best possible speed both link - * partners support can be negotiated. - */ - tmp = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL); - tmp |= PORT_LOGIC_SPEED_CHANGE; - dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp); - if (imx6_pcie->variant != IMX7D) { /* - * On i.MX7, DIRECT_SPEED_CHANGE behaves differently - * from i.MX6 family when no link speed transition - * occurs and we go Gen1 -> yep, Gen1. The difference - * is that, in such case, it will not be cleared by HW - * which will cause the following code to report false - * failure. + * Start Directed Speed Change so the best possible + * speed both link partners support can be negotiated. */ + tmp = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL); + tmp |= PORT_LOGIC_SPEED_CHANGE; + dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp); + + if (imx6_pcie->variant != IMX7D) { + /* + * On i.MX7, DIRECT_SPEED_CHANGE behaves differently + * from i.MX6 family when no link speed transition + * occurs and we go Gen1 -> yep, Gen1. The difference + * is that, in such case, it will not be cleared by HW + * which will cause the following code to report false + * failure. + */ + + ret = imx6_pcie_wait_for_speed_change(imx6_pcie); + if (ret) { + dev_err(dev, "Failed to bring link up!\n"); + goto err_reset_phy; + } + } - ret = imx6_pcie_wait_for_speed_change(imx6_pcie); + /* Make sure link training is finished as well! */ + ret = imx6_pcie_wait_for_link(imx6_pcie); if (ret) { dev_err(dev, "Failed to bring link up!\n"); goto err_reset_phy; } - } - - /* Make sure link training is finished as well! */ - ret = imx6_pcie_wait_for_link(imx6_pcie); - if (ret) { - dev_err(dev, "Failed to bring link up!\n"); - goto err_reset_phy; + } else { + dev_info(dev, "Link: Gen2 disabled\n"); } tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCSR); |