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author | Gabor Juhos <j4g8y7@gmail.com> | 2024-03-26 14:34:11 +0100 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2024-05-08 04:10:17 +0200 |
commit | c55f7ee2ec239b6afd8639c7ac06493876deb0ea (patch) | |
tree | d70975f5388589dbb186d4b4bbce755e1701e0e4 | |
parent | clk: qcom: Fix SM_GPUCC_8650 dependencies (diff) | |
download | linux-c55f7ee2ec239b6afd8639c7ac06493876deb0ea.tar.xz linux-c55f7ee2ec239b6afd8639c7ac06493876deb0ea.zip |
clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018
According to ipq5018.dtsi, the maximum supported rate by the
CPU is 1.008 GHz on the IPQ5018 platform, however the current
configuration of the PLL results in 1.2 GHz rate.
Change the 'L' value in the PLL configuration to limit the
rate to 1.008 GHz. The downstream kernel also uses the same
value [1]. Also add a comment to indicate the desired
frequency.
[1] https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/blob/NHSS.QSDK.12.4/drivers/clk/qcom/apss-ipq5018.c?ref_type=heads#L151
Fixes: 50492f929486 ("clk: qcom: apss-ipq-pll: add support for IPQ5018")
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240326-fix-ipq5018-apss-pll-rate-v1-1-82ab31c9da7e@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r-- | drivers/clk/qcom/apss-ipq-pll.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c index 1a6f4db25379..5f7f537e4ecb 100644 --- a/drivers/clk/qcom/apss-ipq-pll.c +++ b/drivers/clk/qcom/apss-ipq-pll.c @@ -66,8 +66,9 @@ static struct clk_alpha_pll ipq_pll_stromer_plus = { }, }; +/* 1.008 GHz configuration */ static const struct alpha_pll_config ipq5018_pll_config = { - .l = 0x32, + .l = 0x2a, .config_ctl_val = 0x4001075b, .config_ctl_hi_val = 0x304, .main_output_mask = BIT(0), |