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| author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2017-02-07 07:13:31 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-02-08 07:44:52 +0100 |
| commit | cb6efc7bea96202dfd2ed6b34f20e3e291f2b6c0 (patch) | |
| tree | db503d3e08d46f4a3ada3e72386f366d8300c19b | |
| parent | drivers: usb-misc: sisusbvga: remove dead code (diff) | |
| download | linux-cb6efc7bea96202dfd2ed6b34f20e3e291f2b6c0.tar.xz linux-cb6efc7bea96202dfd2ed6b34f20e3e291f2b6c0.zip | |
arm64: dts: mt8173: add reference clock for usb
Due to the reference clock comes from 26M oscillator directly
on mt8173, and it is a fixed-clock in DTS which always turned
on, we ignore it before. But on some platforms, it comes
from PLL, and need be controlled, so here add it, no matter
it is a fixed-clock or not.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 12e702771f5c..40a02b29213e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -728,9 +728,11 @@ <&phy_port1 PHY_TYPE_USB2>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; clocks = <&topckgen CLK_TOP_USB30_SEL>, + <&clk26m>, <&pericfg CLK_PERI_USB0>, <&pericfg CLK_PERI_USB1>; clock-names = "sys_ck", + "ref_ck", "wakeup_deb_p0", "wakeup_deb_p1"; mediatek,syscon-wakeup = <&pericfg>; @@ -745,8 +747,8 @@ reg-names = "mac"; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; - clocks = <&topckgen CLK_TOP_USB30_SEL>; - clock-names = "sys_ck"; + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; + clock-names = "sys_ck", "ref_ck"; status = "disabled"; }; }; |