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| author | Chen Feng <puck.chen@hisilicon.com> | 2016-02-14 07:29:19 +0100 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2016-04-19 08:57:20 +0200 |
| commit | cbdd535d9481025a5a9020f9e9875b68ad86111c (patch) | |
| tree | 891fbb1d3356e80f9aa06e08ab57d0ed09ee53ff | |
| parent | mfd: wm8400: Use devm_mfd_add_devices() for mfd_device registration (diff) | |
| download | linux-cbdd535d9481025a5a9020f9e9875b68ad86111c.tar.xz linux-cbdd535d9481025a5a9020f9e9875b68ad86111c.zip | |
mfd: hi655x: Add document for hi665x PMIC
DT bindings for hisilicon HI655x PMIC chip.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Fei Wang <w.f@huawei.com>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt new file mode 100644 index 000000000000..05485699d70e --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt @@ -0,0 +1,27 @@ +Hisilicon Hi655x Power Management Integrated Circuit (PMIC) + +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. +We can use memory-mapped I/O to communicate. + ++----------------+ +-------------+ +| | | | +| Hi6220 | SSI bus | Hi655x | +| |-------------| | +| |(REGMAP_MMIO)| | ++----------------+ +-------------+ + +Required properties: +- compatible: Should be "hisilicon,hi655x-pmic". +- reg: Base address of PMIC on Hi6220 SoC. +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). +- pmic-gpios: The GPIO used by PMIC IRQ. + +Example: + pmic: pmic@f8000000 { + compatible = "hisilicon,hi655x-pmic"; + reg = <0x0 0xf8000000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + } |