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authorKomal Bajaj <quic_kbajaj@quicinc.com>2023-08-30 12:56:53 +0200
committerBjorn Andersson <andersson@kernel.org>2023-09-20 04:57:53 +0200
commit0bc76be64e80b15b975345b6957a87a1893c34f2 (patch)
treed182d11360f2c7d41c6a04dda40818b29f38a720
parentsoc: qcom: Add LLCC support for multi channel DDR (diff)
downloadlinux-0bc76be64e80b15b975345b6957a87a1893c34f2.tar.xz
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soc: qcom: llcc: Updating the macro name
Update macro name for LLCC_DRE to LLCC_ECC as per the latest specification. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230830105654.28057-6-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--drivers/soc/qcom/llcc-qcom.c2
-rw-r--r--include/linux/soc/qcom/llcc-qcom.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index c31d9e39e864..3bd841e67eba 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -191,7 +191,7 @@ static const struct llcc_slice_config sc8280xp_data[] = {
{ LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
{ LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
{ LLCC_AUDHW, 22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
- { LLCC_DRE, 26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
+ { LLCC_ECC, 26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
{ LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
{ LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
{ LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
index 93417ba1ead4..1a886666bbb6 100644
--- a/include/linux/soc/qcom/llcc-qcom.h
+++ b/include/linux/soc/qcom/llcc-qcom.h
@@ -30,7 +30,7 @@
#define LLCC_NPU 23
#define LLCC_WLHW 24
#define LLCC_PIMEM 25
-#define LLCC_DRE 26
+#define LLCC_ECC 26
#define LLCC_CVP 28
#define LLCC_MODPE 29
#define LLCC_APTCM 30