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authorFabrizio Castro <fabrizio.castro@bp.renesas.com>2017-10-23 20:09:21 +0200
committerSimon Horman <horms+renesas@verge.net.au>2017-11-27 11:39:44 +0100
commit0d975e29a51011c244d41e16a59a26fddf6ea281 (patch)
tree36c86f0e9f8d4f1389f0dba57c750a4de4fa7f31
parentARM: dts: r8a7794: Use R-Car Gen2 Ether fallback compat string (diff)
downloadlinux-0d975e29a51011c244d41e16a59a26fddf6ea281.tar.xz
linux-0d975e29a51011c244d41e16a59a26fddf6ea281.zip
ARM: dts: r8a7743: Add DU support
Add du node to r8a7743 SoC DT. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7743.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index f647b86c0205..112a72baa7a4 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1034,6 +1034,36 @@
};
};
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7743";
+ reg = <0 0xfeb00000 0 0x40000>,
+ <0 0xfeb90000 0 0x1c>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
+
pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7743",
"renesas,pci-rcar-gen2";