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authorStephen Boyd <sboyd@kernel.org>2024-05-17 03:08:47 +0200
committerStephen Boyd <sboyd@kernel.org>2024-05-17 03:08:47 +0200
commit7552d1b935fdec1b19b620b56462a1719fa3d469 (patch)
treeebfda0fb7191f2b6b61ba7d77c08dea2fa0f21c5
parentMerge branches 'clk-cleanup', 'clk-airoha', 'clk-mediatek', 'clk-sophgo' and ... (diff)
parentdt-bindings: clocks: stm32mp25: add access-controllers description (diff)
parentMerge tag 'renesas-clk-for-v6.10-tag2' of git://git.kernel.org/pub/scm/linux/... (diff)
parentclk: scmi: Add support for get/set duty_cycle operations (diff)
parentMerge tag 'sunxi-clk-for-6.10-1' of https://git.kernel.org/pub/scm/linux/kern... (diff)
downloadlinux-7552d1b935fdec1b19b620b56462a1719fa3d469.tar.xz
linux-7552d1b935fdec1b19b620b56462a1719fa3d469.zip
Merge branches 'clk-stm', 'clk-renesas', 'clk-scmi' and 'clk-allwinner' into clk-next
- STM32MP257 SoC clk driver - Allocate clk_ops dynamically for SCMI clk driver * clk-stm: dt-bindings: clocks: stm32mp25: add access-controllers description clk: stm32: introduce clocks for STM32MP257 platform dt-bindings: clocks: stm32mp25: add description of all parents clk: stm32mp13: use platform device APIs * clk-renesas: clk: renesas: r9a08g045: Add support for power domains clk: renesas: rzg2l: Extend power domain support dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> for RZ/G3S dt-bindings: clock: r9a08g045-cpg: Add power domain IDs dt-bindings: clock: r9a07g054-cpg: Add power domain IDs dt-bindings: clock: r9a07g044-cpg: Add power domain IDs dt-bindings: clock: r9a07g043-cpg: Add power domain IDs clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT clk: renesas: r8a7740: Remove unused div4_clk.flags field clk: renesas: r9a07g043: Add clock and reset entry for PLIC clk: renesas: r8a779h0: Add INTC-EX clock clk: renesas: r8a779h0: Add MSIOF clocks clk: renesas: r8a779a0: Fix CANFD parent clock clk: rs9: fix wrong default value for clock amplitude clk: renesas: r8a779h0: Add timer clocks clk: renesas: r8a779h0: Add SCIF clocks clk: renesas: r9a07g044: Mark resets array as const clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const clk: renesas: r8a779h0: Add thermal clock dt-bindings: clock: r9a07g043-cpg: Annotate RZ/G2UL-only core clocks * clk-scmi: clk: scmi: Add support for get/set duty_cycle operations clk: scmi: Add support for re-parenting restricted clocks clk: scmi: Add support for rate change restricted clocks clk: scmi: Add support for state control restricted clocks clk: scmi: Allocate CLK operations dynamically * clk-allwinner: clk: sunxi-ng: fix module autoloading clk: sunxi-ng: a64: Add constraints on PLL-MIPI's n/m ratio and parent rate clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate