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author | Alex Deucher <alexdeucher@gmail.com> | 2010-04-09 21:31:56 +0200 |
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committer | Dave Airlie <airlied@redhat.com> | 2010-04-19 05:52:43 +0200 |
commit | a1a4b23b66039c814c3d3a9a28d76d34800eadc5 (patch) | |
tree | 1afffa74a688a00c078bcb31dce64941c8bc9ea0 | |
parent | drm/radeon/kms: fix tv dac conflict resolver (diff) | |
download | linux-a1a4b23b66039c814c3d3a9a28d76d34800eadc5.tar.xz linux-a1a4b23b66039c814c3d3a9a28d76d34800eadc5.zip |
drm/radeon/kms: adjust pll settings for tv
May fix fdo bug 26582.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index fd4ef6d18849..a87990b3ae84 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -521,6 +521,10 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) adjusted_clock = mode->clock * 2; + if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) { + pll->algo = PLL_ALGO_LEGACY; + pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER; + } } else { if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; |