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| author | Linus Walleij <linus.walleij@linaro.org> | 2019-10-01 09:46:28 +0200 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-10-01 20:01:27 +0200 |
| commit | cdee3b60af594403bd389e6e8239bcd0b4a159fc (patch) | |
| tree | 0bc577f2b9ec5b3ac200581c189427d93ab5ad34 | |
| parent | arm64/ARM: configs: Change CONFIG_REMOTEPROC from m to y (diff) | |
| download | linux-cdee3b60af594403bd389e6e8239bcd0b4a159fc.tar.xz linux-cdee3b60af594403bd389e6e8239bcd0b4a159fc.zip | |
ARM: dts: ux500: Fix up the CPU thermal zone
This fixes up the default ux500 CPU thermal zone:
- Set polling delay to 0 and explain why
- Set passive polling delay to 250
- Remove restrictions from the CPU cooling device,
we should use all cpufreq steps to cool down if
needed.
Link: https://lore.kernel.org/r/20191001074628.8122-1-linus.walleij@linaro.org
Fixes: b786a05f6ce4 ("ARM: dts: ux500: Update thermal zone")
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
| -rw-r--r-- | arch/arm/boot/dts/ste-dbx5x0.dtsi | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index a53657b83288..bda454d12150 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/mfd/dbx500-prcmu.h> #include <dt-bindings/arm/ux500_pm_domains.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/thermal/thermal.h> / { #address-cells = <1>; @@ -59,8 +60,12 @@ * cooling. */ cpu_thermal: cpu-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; + polling-delay-passive = <250>; + /* + * This sensor fires interrupts to update the thermal + * zone, so no polling is needed. + */ + polling-delay = <0>; thermal-sensors = <&thermal>; @@ -79,7 +84,7 @@ cooling-maps { trip = <&cpu_alert>; - cooling-device = <&CPU0 0 2>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <100>; }; }; |