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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-02-04 13:27:21 +0100 |
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committer | Michael Turquette <mturquette@linaro.org> | 2015-02-04 23:02:42 +0100 |
commit | 5469d4f22e0c18fc5499b11269d2c528094bcf1e (patch) | |
tree | 1a47fb1cdad6fb2931d8b0951e917ac8b9937cbc | |
parent | clk: mxs: Fix invalid 32-bit access to frac registers (diff) | |
download | linux-5469d4f22e0c18fc5499b11269d2c528094bcf1e.tar.xz linux-5469d4f22e0c18fc5499b11269d2c528094bcf1e.zip |
clk: shmobile: div6: Avoid division by zero in .round_rate()
Anyone may call clk_round_rate() with a zero rate value, so we have to
protect against that.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
-rw-r--r-- | drivers/clk/shmobile/clk-div6.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c index efbaf6c81b75..036a692c7219 100644 --- a/drivers/clk/shmobile/clk-div6.c +++ b/drivers/clk/shmobile/clk-div6.c @@ -90,6 +90,9 @@ static unsigned int cpg_div6_clock_calc_div(unsigned long rate, { unsigned int div; + if (!rate) + rate = 1; + div = DIV_ROUND_CLOSEST(parent_rate, rate); return clamp_t(unsigned int, div, 1, 64); } |