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authorMasahiro Yamada <yamada.masahiro@socionext.com>2019-08-25 03:31:27 +0200
committerMasahiro Yamada <yamada.masahiro@socionext.com>2019-08-29 16:54:29 +0200
commit1634f2bfdb846ed0a8b73131a9dff7c420fb3fe1 (patch)
treee11cf667281d9d4cb4d1f0f115a3ccef077781ed
parentkbuild: check clean srctree even earlier (diff)
downloadlinux-1634f2bfdb846ed0a8b73131a9dff7c420fb3fe1.tar.xz
linux-1634f2bfdb846ed0a8b73131a9dff7c420fb3fe1.zip
kbuild: remove clean-dirs syntax
The only the difference between clean-files and clean-dirs is the -r option passed to the 'rm' command. You can always pass -r, and then remove the clean-dirs syntax. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r--Documentation/kbuild/makefiles.rst16
-rw-r--r--scripts/Makefile.clean16
-rw-r--r--scripts/kconfig/Makefile2
-rw-r--r--usr/include/Makefile4
4 files changed, 8 insertions, 30 deletions
diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst
index 9fb2de94c3e2..e9ffdffa3641 100644
--- a/Documentation/kbuild/makefiles.rst
+++ b/Documentation/kbuild/makefiles.rst
@@ -750,7 +750,8 @@ Files matching the patterns "*.[oas]", "*.ko", plus some additional files
generated by kbuild are deleted all over the kernel src tree when
"make clean" is executed.
-Additional files can be specified in kbuild makefiles by use of $(clean-files).
+Additional files or directories can be specified in kbuild makefiles by use of
+$(clean-files).
Example::
@@ -761,17 +762,8 @@ When executing "make clean", the file "crc32table.h" will be deleted.
Kbuild will assume files to be in the same relative directory as the
Makefile, except if prefixed with $(objtree).
-To delete a directory hierarchy use:
-
- Example::
-
- #scripts/package/Makefile
- clean-dirs := $(objtree)/debian/
-
-This will delete the directory debian in the toplevel directory, including all
-subdirectories.
-
-To exclude certain files from make clean, use the $(no-clean-files) variable.
+To exclude certain files or directories from make clean, use the
+$(no-clean-files) variable.
Usually kbuild descends down in subdirectories due to "obj-* := dir/",
but in the architecture makefiles where the kbuild infrastructure
diff --git a/scripts/Makefile.clean b/scripts/Makefile.clean
index 0b80e3207b20..cbfbe13dc87d 100644
--- a/scripts/Makefile.clean
+++ b/scripts/Makefile.clean
@@ -52,27 +52,15 @@ __clean-files := $(wildcard \
$(addprefix $(obj)/, $(filter-out $(objtree)/%, $(__clean-files))) \
$(filter $(objtree)/%, $(__clean-files)))
-# same as clean-files
-
-__clean-dirs := $(wildcard \
- $(addprefix $(obj)/, $(filter-out $(objtree)/%, $(clean-dirs))) \
- $(filter $(objtree)/%, $(clean-dirs)))
-
# ==========================================================================
-quiet_cmd_clean = CLEAN $(obj)
- cmd_clean = rm -f $(__clean-files)
-quiet_cmd_cleandir = CLEAN $(__clean-dirs)
- cmd_cleandir = rm -rf $(__clean-dirs)
-
+quiet_cmd_clean = CLEAN $(obj)
+ cmd_clean = rm -rf $(__clean-files)
__clean: $(subdir-ymn)
ifneq ($(strip $(__clean-files)),)
+$(call cmd,clean)
endif
-ifneq ($(strip $(__clean-dirs)),)
- +$(call cmd,cleandir)
-endif
@:
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index 7656e1137b6b..bed7a5a2fbe9 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -114,7 +114,7 @@ testconfig: $(obj)/conf
$(PYTHON3) -B -m pytest $(srctree)/$(src)/tests \
-o cache_dir=$(abspath $(obj)/tests/.cache) \
$(if $(findstring 1,$(KBUILD_VERBOSE)),--capture=no)
-clean-dirs += tests/.cache
+clean-files += tests/.cache
# Help text used by make help
help:
diff --git a/usr/include/Makefile b/usr/include/Makefile
index 1fb6abe29b2f..05c71ef42f51 100644
--- a/usr/include/Makefile
+++ b/usr/include/Makefile
@@ -115,6 +115,4 @@ header-test-y += $(filter-out $(header-test-), \
$(patsubst $(obj)/%,%, $(wildcard \
$(addprefix $(obj)/, *.h */*.h */*/*.h */*/*/*.h))))
-# For GNU Make <= 4.2.1, $(wildcard $(obj)/*/) matches to not only directories
-# but also regular files. Use $(filter %/, ...) just in case.
-clean-dirs += $(patsubst $(obj)/%/,%,$(filter %/, $(wildcard $(obj)/*/)))
+clean-files += $(filter-out Makefile, $(notdir $(wildcard $(obj)/*)))