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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-03-06 09:50:38 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2020-03-13 18:06:34 +0100 |
commit | 30b435d54b84fd1f9c53a237dec3c224ec1e59c7 (patch) | |
tree | 53631431730f783cfa3021fc761a712d853d57b9 | |
parent | spi: dt-bindings: spi-controller: Fix #address-cells for slave mode (diff) | |
download | linux-30b435d54b84fd1f9c53a237dec3c224ec1e59c7.tar.xz linux-30b435d54b84fd1f9c53a237dec3c224ec1e59c7.zip |
spi: dt-bindings: spi-controller: Fix spi-[rt]x-bus-width for slave mode
The descriptions for the spi-rx-bus-width and spi-tx-bus-width
properties refer to "MISO" and "MOSI", which are not explained in the
document. While these abbreviations are fairly common when talking
about SPI, and thus may not need an explanation, they are not entirely
correct in this context, as the SPI controller may be used in slave mode
instead of master mode.
Fix this by replacing them by "read transfers" resp. "write transfers",
like is done for the spi-rx-delay-us and spi-tx-delay-us properties.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200306085038.8111-3-geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-controller.yaml | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 0ebaf6677ac4..d8e5509a7081 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -120,7 +120,7 @@ patternProperties: - enum: [ 1, 2, 4, 8 ] - default: 1 description: - Bus width to the SPI bus used for MISO. + Bus width to the SPI bus used for read transfers. spi-rx-delay-us: description: @@ -132,7 +132,7 @@ patternProperties: - enum: [ 1, 2, 4, 8 ] - default: 1 description: - Bus width to the SPI bus used for MOSI. + Bus width to the SPI bus used for write transfers. spi-tx-delay-us: description: |