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authorDavid Panariti <David.Panariti@amd.com>2018-05-22 20:09:06 +0200
committerAlex Deucher <alexander.deucher@amd.com>2018-06-15 19:20:41 +0200
commit981658c67a97591ce03b5b94f7be9f5f92720e8d (patch)
tree8ea83eef764cf1cc9a408616f2ee8804bda25341
parentdrm/amdgpu: Added ISR for CP ECC/EDC interrupt v2. (diff)
downloadlinux-981658c67a97591ce03b5b94f7be9f5f92720e8d.tar.xz
linux-981658c67a97591ce03b5b94f7be9f5f92720e8d.zip
drm/amdgpu: Add interrupt SQ source struct to amdgpu_gfx struct v2.
SQ can generate interrupts on EDC/ECC errors and this struct controls how the interrupt is handled. The guts are filled in in the gf_v<major>_<minor>.c files. v2: Rebase. Signed-off-by: David Panariti <David.Panariti@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 54be18b1ac94..71b9b861f60e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -969,6 +969,7 @@ struct amdgpu_gfx {
struct amdgpu_irq_src priv_reg_irq;
struct amdgpu_irq_src priv_inst_irq;
struct amdgpu_irq_src cp_ecc_error_irq;
+ struct amdgpu_irq_src sq_irq;
/* gfx status */
uint32_t gfx_current_status;
/* ce ram size*/