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authorPaul Burton <paul.burton@imgtec.com>2015-09-22 19:26:40 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-10-26 09:49:46 +0100
commitb657a628661570adb301284084a5335302685269 (patch)
tree7d1df3c0ca19335e71328e7416d723565c79ea42
parentMIPS: Avoid buffer overrun in mips_cm_error_report (diff)
downloadlinux-b657a628661570adb301284084a5335302685269.tar.xz
linux-b657a628661570adb301284084a5335302685269.zip
MIPS: Allow read64 GCR accessors to work on MIPS32 kernels
If we run a MIPS32 kernel on a system using CM3 we may still need to access 64 bit GCRs, as will be done in later patches. Allow this by having the read64_gcr_* accessor functions perform 2 x 32 bit reads on those systems. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11188/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/mips-cm.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
index 465a7c1f737b..7234fb7b3f22 100644
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -125,7 +125,17 @@ static inline u32 read32_gcr_##name(void) \
\
static inline u64 read64_gcr_##name(void) \
{ \
- return __raw_readq(addr_gcr_##name()); \
+ void __iomem *addr = addr_gcr_##name(); \
+ u64 ret; \
+ \
+ if (mips_cm_is64) { \
+ ret = __raw_readq(addr); \
+ } else { \
+ ret = __raw_readl(addr); \
+ ret |= (u64)__raw_readl(addr + 0x4) << 32; \
+ } \
+ \
+ return ret; \
} \
\
static inline unsigned long read_gcr_##name(void) \