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authorQiuxu Zhuo <qiuxu.zhuo@intel.com>2023-01-13 04:28:00 +0100
committerTony Luck <tony.luck@intel.com>2023-01-25 17:17:08 +0100
commite4b2bc6616e21f4a7ce4e7452f716e3db8fe66b6 (patch)
treed8db62dae90af7167d4303f2ffd1385278f55cfa
parentEDAC/skx_common: Delete duplicated and unreachable code (diff)
downloadlinux-e4b2bc6616e21f4a7ce4e7452f716e3db8fe66b6.tar.xz
linux-e4b2bc6616e21f4a7ce4e7452f716e3db8fe66b6.zip
EDAC/i10nm: Add Intel Emerald Rapids server support
The Emerald Rapids CPU model uses similar memory controller registers as Sapphire Rapids server. Add Emerald Rapids CPU model number ID for EDAC support. Tested-by: Li Zhang <li4.zhang@intel.com> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/all/20230113032802.41752-1-qiuxu.zhuo@intel.com
-rw-r--r--drivers/edac/i10nm_base.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index 65aeea53e2df..e11726f7fe36 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -637,6 +637,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = {
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_D, X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
+ X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
{}
};
MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);