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authorAlex Shi <alex.shi@linaro.org>2017-01-12 14:27:03 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-01-30 11:05:29 +0100
commit37efa4b41ffb31dcdfc3beb97d47992bb2a083e5 (patch)
treeb0349aa9ebf511ac64c0060d7d852111f0968002
parentcpuidle/menu: add per CPU PM QoS resume latency consideration (diff)
downloadlinux-37efa4b41ffb31dcdfc3beb97d47992bb2a083e5.tar.xz
linux-37efa4b41ffb31dcdfc3beb97d47992bb2a083e5.zip
CPU / PM: expose pm_qos_resume_latency for CPUs
The cpu-dma PM QoS constraint impacts all the cpus in the system. There is no way to let the user to choose a PM QoS constraint per cpu. The following patch exposes to the userspace a per cpu based sysfs file in order to let the userspace to change the value of the PM QoS latency constraint. This change is inoperative in its form and the cpuidle governors have to take into account the per cpu latency constraint in addition to the global cpu-dma latency constraint in order to operate properly. BTW The pm_qos_resume_latency usage defined in Documentation/ABI/testing/sysfs-devices-power The /sys/devices/.../power/pm_qos_resume_latency_us attribute contains the PM QoS resume latency limit for the given device, which is the maximum allowed time it can take to resume the device, after it has been suspended at run time, from a resume request to the moment the device will be ready to process I/O, in microseconds. If it is equal to 0, however, this means that the PM QoS resume latency may be arbitrary. Signed-off-by: Alex Shi <alex.shi@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r--drivers/base/cpu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index 4c28e1a09786..2c3b359b3536 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c
@@ -17,6 +17,7 @@
#include <linux/of.h>
#include <linux/cpufeature.h>
#include <linux/tick.h>
+#include <linux/pm_qos.h>
#include "base.h"
@@ -376,6 +377,7 @@ int register_cpu(struct cpu *cpu, int num)
per_cpu(cpu_sys_devices, num) = &cpu->dev;
register_cpu_under_node(num, cpu_to_node(num));
+ dev_pm_qos_expose_latency_limit(&cpu->dev, 0);
return 0;
}