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authorBo Yan <byan@nvidia.com>2018-03-13 18:24:31 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-03-14 18:05:34 +0100
commit57adbeea6451cedfeda257fe77749512894dff29 (patch)
tree123331e207e9565f22f25024c921af5321f68f2d
parentcoresight: Use %px to print pcsr instead of %p (diff)
downloadlinux-57adbeea6451cedfeda257fe77749512894dff29.tar.xz
linux-57adbeea6451cedfeda257fe77749512894dff29.zip
coresight: etm4x: Fix bit shifting
ctxid_pid and vmid_val in config are of type u64. When an integer 0xFF is being left shifted more than 32 bits, the behavior is undefined. The fix is to specify 0xFF as an unsigned long. Detected by Coverity scan: CID 37650, 37651 (Bad bit shift operation) Signed-off-by: Bo Yan <byan@nvidia.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/hwtracing/coresight/coresight-etm4x-sysfs.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
index 4e6eab53e34e..d21961710713 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
@@ -1780,7 +1780,7 @@ static ssize_t ctxid_masks_store(struct device *dev,
*/
for (j = 0; j < 8; j++) {
if (maskbyte & 1)
- config->ctxid_pid[i] &= ~(0xFF << (j * 8));
+ config->ctxid_pid[i] &= ~(0xFFUL << (j * 8));
maskbyte >>= 1;
}
/* Select the next ctxid comparator mask value */
@@ -1963,7 +1963,7 @@ static ssize_t vmid_masks_store(struct device *dev,
*/
for (j = 0; j < 8; j++) {
if (maskbyte & 1)
- config->vmid_val[i] &= ~(0xFF << (j * 8));
+ config->vmid_val[i] &= ~(0xFFUL << (j * 8));
maskbyte >>= 1;
}
/* Select the next vmid comparator mask value */