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authorAndi Kleen <andi@firstfloor.org>2009-02-12 13:39:30 +0100
committerH. Peter Anvin <hpa@linux.intel.com>2009-02-18 00:32:50 +0100
commit5b4408fdaa62474dd9485cddb9126370d90d4b82 (patch)
treede7b83f9e2a9a722ee70b468f5a21ba4f3b00bc2
parentx86, mce: switch machine check polling to per CPU timer (diff)
downloadlinux-5b4408fdaa62474dd9485cddb9126370d90d4b82.tar.xz
linux-5b4408fdaa62474dd9485cddb9126370d90d4b82.zip
x86, mce: don't set up mce sysdev devices with mce=off
Impact: bug fix, in this case the resume handler shouldn't run which avoids incorrectly reenabling machine checks on resume When MCEs are completely disabled on the command line don't set up the sysdev devices for them either. Includes a comment fix from Thomas Gleixner. Signed-off-by: Andi Kleen <ak@linux.intel.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_64.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 3f0550d16f3c..4e2b1bc5131c 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -151,6 +151,8 @@ static void mce_panic(char *msg, struct mce *backup, unsigned long start)
static int mce_available(struct cpuinfo_x86 *c)
{
+ if (mce_dont_init)
+ return 0;
return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
}
@@ -532,8 +534,7 @@ void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
{
mce_cpu_quirks(c);
- if (mce_dont_init ||
- !mce_available(c))
+ if (!mce_available(c))
return;
mce_init(NULL);
@@ -710,8 +711,7 @@ static int __init mcheck_disable(char *str)
return 1;
}
-/* mce=off disables machine check. Note you can re-enable it later
- using sysfs.
+/* mce=off disables machine check.
mce=TOLERANCELEVEL (number, see above)
mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
mce=nobootlog Don't log MCEs from before booting. */