diff options
| author | Jerome Brunet <jbrunet@baylibre.com> | 2017-03-09 11:41:53 +0100 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2017-03-27 21:30:38 +0200 |
| commit | b68fb7871e15ae2a37294dda4ab86936b72450f5 (patch) | |
| tree | 0427bd591c6a1957fce4fd02f5bdd2b7254a71a5 | |
| parent | clk: meson8b: add the mplls clocks 0, 1 and 2 (diff) | |
| download | linux-b68fb7871e15ae2a37294dda4ab86936b72450f5.tar.xz linux-b68fb7871e15ae2a37294dda4ab86936b72450f5.zip | |
clk: meson: mpll: correct N2 maximum value
Gxbb datasheet says N2 maximum value is 127 but the register field is
9 bits wide, the maximum value should 511.
Test shows value greater than 127, all the way to 511, works well
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20170309104154.28295-9-jbrunet@baylibre.com
| -rw-r--r-- | drivers/clk/meson/clk-mpll.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/meson/clk-mpll.c b/drivers/clk/meson/clk-mpll.c index 342b85d4e22a..540dabe5adad 100644 --- a/drivers/clk/meson/clk-mpll.c +++ b/drivers/clk/meson/clk-mpll.c @@ -68,7 +68,7 @@ #define SDM_MIN 1 #define SDM_MAX 16383 #define N2_MIN 4 -#define N2_MAX 127 +#define N2_MAX 511 #define to_meson_clk_mpll(_hw) container_of(_hw, struct meson_clk_mpll, hw) |