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author | Heiko Stuebner <heiko@sntech.de> | 2017-12-11 01:11:14 +0100 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2018-02-12 15:00:47 +0100 |
commit | 1d334427c924b849d590ea1aea4adaaa43c5fa7f (patch) | |
tree | 4864d6d19bd44d24342b760eb1b625b5f4585209 | |
parent | clk: rockchip: remove HCLK_VIO from rk3328 dt header (diff) | |
download | linux-1d334427c924b849d590ea1aea4adaaa43c5fa7f.tar.xz linux-1d334427c924b849d590ea1aea4adaaa43c5fa7f.zip |
clk: rockchip: export sclk_hdmi_sfc on rk3328
This clock is one of the dw-hdmi supplying clocks and thus
needs to be exported.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | drivers/clk/rockchip/clk-rk3328.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c index 17816aec206a..b7a28f2814e2 100644 --- a/drivers/clk/rockchip/clk-rk3328.c +++ b/drivers/clk/rockchip/clk-rk3328.c @@ -588,7 +588,7 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = { COMPOSITE(ACLK_VOP_PRE, "aclk_vop_pre", mux_4plls_p, 0, RK3328_CLKSEL_CON(39), 6, 2, MFLAGS, 0, 5, DFLAGS, RK3328_CLKGATE_CON(5), 5, GFLAGS), - GATE(0, "clk_hdmi_sfc", "xin24m", 0, + GATE(SCLK_HDMI_SFC, "sclk_hdmi_sfc", "xin24m", 0, RK3328_CLKGATE_CON(5), 4, GFLAGS), COMPOSITE_NODIV(0, "clk_cif_src", mux_2plls_p, 0, |