diff options
| author | Roger Quadros <rogerq@ti.com> | 2016-02-23 17:37:23 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2016-02-26 19:32:14 +0100 |
| commit | 6d840d85a7b94b5399bbf4ac582fbc3fb984466c (patch) | |
| tree | 462cad30e718b2d2d1d9389a8fb8883efce085be | |
| parent | ARM: dts: am335x: Disable wait pin monitoring for NAND (diff) | |
| download | linux-6d840d85a7b94b5399bbf4ac582fbc3fb984466c.tar.xz linux-6d840d85a7b94b5399bbf4ac582fbc3fb984466c.zip | |
ARM: dts: dm816x: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | arch/arm/boot/dts/dm8168-evm.dts | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/dm816x.dtsi | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts index 169a85578fc9..0cb1003c41bb 100644 --- a/arch/arm/boot/dts/dm8168-evm.dts +++ b/arch/arm/boot/dts/dm8168-evm.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "dm816x.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> / { model = "DM8168 EVM"; @@ -85,8 +86,12 @@ ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ nand@0,0 { + compatible = "ti,omap2-nand"; linux,mtd-name= "micron,mt29f2g16aadwp"; reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + interrupt-parent = <&gpmc>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ #address-cells = <1>; #size-cells = <1>; ti,nand-ecc-opt = "bch8"; diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi index c3b8811a3e58..30fa5b69c590 100644 --- a/arch/arm/boot/dts/dm816x.dtsi +++ b/arch/arm/boot/dts/dm816x.dtsi @@ -183,6 +183,8 @@ dma-names = "rxtx"; gpmc,num-cs = <6>; gpmc,num-waitpins = <2>; + interrupt-controller; + #interrupt-cells = <2>; }; i2c1: i2c@48028000 { |