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| author | Ingo Molnar <mingo@kernel.org> | 2012-05-30 14:12:06 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2012-05-30 14:12:06 +0200 |
| commit | 403e1c5b7495d7b80fae9fc4d0a7a6f5abdc3307 (patch) | |
| tree | c1f762dda525faf24aa10d6f81cf043da202c54f | |
| parent | x86/mm/pat: Improve scaling of pat_pagerange_is_ram() (diff) | |
| parent | x86/mce: Fix 32-bit build (diff) | |
| download | linux-403e1c5b7495d7b80fae9fc4d0a7a6f5abdc3307.tar.xz linux-403e1c5b7495d7b80fae9fc4d0a7a6f5abdc3307.zip | |
Merge branch 'x86/mce' into x86/urgent
Merge in these fixlets.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
| -rw-r--r-- | arch/x86/include/asm/bitops.h | 2 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce.c | 6 | ||||
| -rw-r--r-- | drivers/edac/mce_amd.h | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index b97596e2b68c..a6983b277220 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -15,6 +15,8 @@ #include <linux/compiler.h> #include <asm/alternative.h> +#define BIT_64(n) (U64_C(1) << (n)) + /* * These have to be done with inline assembly: that way the bit-setting * is guaranteed to be atomic. All bit operations return 0 if the bit diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 2afcbd253e1d..aaa056f31693 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1458,9 +1458,9 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) rdmsrl(msrs[i], val); /* CntP bit set? */ - if (val & BIT(62)) { - val &= ~BIT(62); - wrmsrl(msrs[i], val); + if (val & BIT_64(62)) { + val &= ~BIT_64(62); + wrmsrl(msrs[i], val); } } diff --git a/drivers/edac/mce_amd.h b/drivers/edac/mce_amd.h index c6074c5cd1ef..8c87a5e87057 100644 --- a/drivers/edac/mce_amd.h +++ b/drivers/edac/mce_amd.h @@ -5,8 +5,6 @@ #include <asm/mce.h> -#define BIT_64(n) (U64_C(1) << (n)) - #define EC(x) ((x) & 0xffff) #define XEC(x, mask) (((x) >> 16) & mask) |