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authorJayachandran C <jchandra@broadcom.com>2013-06-10 08:41:02 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-06-13 17:46:42 +0200
commit571886b2a52395f030d439c6259663a033e11e6a (patch)
tree5e386eaa6465785dc16d3dc2693fe8b23e557f1c
parentMIPS: Netlogic: Split reset code out of smpboot.S (diff)
downloadlinux-571886b2a52395f030d439c6259663a033e11e6a.tar.xz
linux-571886b2a52395f030d439c6259663a033e11e6a.zip
MIPS: Netlogic: Initialization when !CONFIG_SMP
The core initialization and reset vector setup needs to be done even when booting uniprocessor. Move this code from smp.c to setup.c Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5428/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/netlogic/common/Makefile3
-rw-r--r--arch/mips/netlogic/common/smp.c6
-rw-r--r--arch/mips/netlogic/xlp/setup.c8
-rw-r--r--arch/mips/netlogic/xlp/wakeup.c1
-rw-r--r--arch/mips/netlogic/xlr/setup.c6
5 files changed, 16 insertions, 8 deletions
diff --git a/arch/mips/netlogic/common/Makefile b/arch/mips/netlogic/common/Makefile
index a396a39ec491..362739d62b1d 100644
--- a/arch/mips/netlogic/common/Makefile
+++ b/arch/mips/netlogic/common/Makefile
@@ -1,4 +1,5 @@
obj-y += irq.o time.o
obj-y += nlm-dma.o
-obj-$(CONFIG_SMP) += smp.o smpboot.o reset.o
+obj-y += reset.o
+obj-$(CONFIG_SMP) += smp.o smpboot.o
obj-$(CONFIG_EARLY_PRINTK) += earlycons.o
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index ffba52489bef..da3d3bc02c20 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -254,15 +254,9 @@ unsupp:
int __cpuinit nlm_wakeup_secondary_cpus(void)
{
- unsigned long reset_vec;
char *reset_data;
int threadmode;
- /* Update reset entry point with CPU init code */
- reset_vec = CKSEG1ADDR(RESET_VEC_PHYS);
- memcpy((void *)reset_vec, (void *)nlm_reset_entry,
- (nlm_reset_entry_end - nlm_reset_entry));
-
/* verify the mask and setup core config variables */
threadmode = nlm_parse_cpumask(&nlm_cpumask);
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index 7b6694998cdc..5bdd354fef48 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -98,11 +98,19 @@ void nlm_percpu_init(int hwcpuid)
void __init prom_init(void)
{
+ void *reset_vec;
+
nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
+ nlm_init_boot_cpu();
xlp_mmu_init();
nlm_node_init(0);
xlp_dt_init((void *)(long)fw_arg0);
+ /* Update reset entry point with CPU init code */
+ reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+ memcpy(reset_vec, (void *)nlm_reset_entry,
+ (nlm_reset_entry_end - nlm_reset_entry));
+
#ifdef CONFIG_SMP
cpumask_setall(&nlm_cpumask);
nlm_wakeup_secondary_cpus();
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index 1a7d529fcec0..abb3e08cc052 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -137,7 +137,6 @@ void xlp_wakeup_secondary_cpus()
* In case of u-boot, the secondaries are in reset
* first wakeup core 0 threads
*/
- nlm_init_boot_cpu();
xlp_boot_core0_siblings();
/* now get other cores out of reset */
diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c
index 89c8c1066632..7e27f8591867 100644
--- a/arch/mips/netlogic/xlr/setup.c
+++ b/arch/mips/netlogic/xlr/setup.c
@@ -196,6 +196,7 @@ void __init prom_init(void)
{
int *argv, *envp; /* passed as 32 bit ptrs */
struct psb_info *prom_infop;
+ void *reset_vec;
#ifdef CONFIG_SMP
int i;
#endif
@@ -208,6 +209,11 @@ void __init prom_init(void)
nlm_prom_info = *prom_infop;
nlm_init_node();
+ /* Update reset entry point with CPU init code */
+ reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+ memcpy(reset_vec, (void *)nlm_reset_entry,
+ (nlm_reset_entry_end - nlm_reset_entry));
+
nlm_early_serial_setup();
build_arcs_cmdline(argv);
prom_add_memory();