diff options
author | Elaine Zhang <zhangqing@rock-chips.com> | 2016-11-08 10:10:14 +0100 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2016-11-14 12:20:53 +0100 |
commit | a554bb5fb01804a38fde3782831c9567d997939e (patch) | |
tree | 44b076daccdd72bd73208c57e5b1dd80adce89d5 | |
parent | clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused (diff) | |
download | linux-a554bb5fb01804a38fde3782831c9567d997939e.tar.xz linux-a554bb5fb01804a38fde3782831c9567d997939e.zip |
clk: rockchip: validity should be checked prior to cpu clock rate change
If validity is not checked prior to clock rate change, clk_set_rate(
cpu_clk, unsupported_rate) will return success, but the real clock rate
change operation is prohibited in post clock change event. Alough post
clock change event will report error due to unsupported clock rate is
set, but this error message is ignored by clock framework.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Tested-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | drivers/clk/rockchip/clk-cpu.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-cpu.c b/drivers/clk/rockchip/clk-cpu.c index 05b3d73bfefa..0e09684d43a5 100644 --- a/drivers/clk/rockchip/clk-cpu.c +++ b/drivers/clk/rockchip/clk-cpu.c @@ -124,9 +124,18 @@ static int rockchip_cpuclk_pre_rate_change(struct rockchip_cpuclk *cpuclk, struct clk_notifier_data *ndata) { const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; + const struct rockchip_cpuclk_rate_table *rate; unsigned long alt_prate, alt_div; unsigned long flags; + /* check validity of the new rate */ + rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate); + if (!rate) { + pr_err("%s: Invalid rate : %lu for cpuclk\n", + __func__, ndata->new_rate); + return -EINVAL; + } + alt_prate = clk_get_rate(cpuclk->alt_parent); spin_lock_irqsave(cpuclk->lock, flags); |